DURHAM, NC (November 19, 2024) — Today, Congresswoman Valerie Foushee (NC-04) announced that the U.S. Department of Commerce and the Semiconductor Research Corporation Manufacturing Consortium Corporation (SRC) are entering negotiations for the Department to provide SRC $285 million through the CHIPS and Science Act to establish and operate a first-of-its-kind CHIPS Manufacturing USA institute headquartered in Durham, North Carolina. The new institute, known as SMART USA (Semiconductor Manufacturing and Advanced Research with Twins USA) will focus on development of digital twins to improve domestic semiconductor design, manufacturing, advanced packaging, assembly, and testing.
“I’m delighted that Durham, a city known for its innovation and collaboration, will be home to the first-ever CHIPS Manufacturing USA digital twin institute,” said Congresswoman Valerie Foushee (NC-04). “This proposed partnership, made possible in part by the CHIPS and Science Act, will be a driving force in transforming and unlocking domestic semiconductor manufacturing and will position the United States to lead in the next generation of semiconductor technology. The SMART USA Institute will put North Carolina at the heart of this new industrial revolution, and I’m proud that our great state will serve at the forefront of enhancing our nation’s innovative edge.”
Digital twins are virtual models used to design and test processes digitally, before replicating processes with physical objects like chips or complex machinery. Digital twin-based research leverages emerging technology like artificial intelligence to optimize chip design, improve production efficiency, and lower costs by streamlining operations and reducing the need for costly adjustments. These technologies will also expand workforce opportunities through real-time feedback, place-based learning, and exposure to previously inaccessible systems.
Specifically, the SMART USA Institute aims to:
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Reduce U.S. chip development and manufacturing costs while improving capacity planning, production optimization, facility upgrades, and real-time process adjustments using digital twins;
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Convene with stakeholders across the semiconductor design, manufacturing, advanced packaging, assembly, and testing industry to address shared challenges relevant to digital twins;
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Reduce development cycle timesfor semiconductor manufacturing, advanced packaging,assembly, and testand accelerate development and adoption of innovative technologies in the manufacturing process;
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Reduce greenhouse gas emissions associated with semiconductor manufacturing; and
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Expand domestic workforce opportunities by training workers and students on digital twin technologies.